Toshiba reduces the power consumption of IP cores by adding unique clock control functionality based on the results of analysis of the structures and operations of clocks.

• Deleting output flip-flops to reduce latency
• Isolating clock controls interface-by-interface and stage-by-stage, and providing autonomous clock control during data transfer

Toshiba helps you reduce the power consumption of your SoC using various technologies, including low-power cell libraries.